Modular and Distributed Verification of SysML Activity Diagrams

International audienceModel-based development for complex system design has been used to support the increase of systems complexity. SysML is a modeling language that allows a system description with various integrated diagrams, but SysML lacks formality for the requirement verification. Translating SysML-based specification into Petri nets allows to enable rigorous system analysis. However, for complex systems, we have to deal with the state space explosion problem. In this paper, we propose new approach to allow a modular and distributed verification of SysML Activity Diagram basing on the derived Petri net

Slicing Based Verification Approach for the Validation of SysML Activity Diagrams

International audienceIn this paper, we focus on the verification of SysML functional requirements on activity diagrams. Our contribution consists in the proposition of a slicing based verification approach guided by the SysML relationships between requirements, blocks, and activities. The objective is to provide a verification methodology for complex systems with many components. The proposed slicing permits to alleviate the verification process. For verifying a given requirement, the slicing consists in extracting a minimized fragment (slice) of the hierarchical coloured Petri net model (translated from the activity diagram) which is sound and sufficient to realize the verification. Our approach is illustrated by a case study, where we specify and we verify a fire protection system for computer rooms

A Methodology for Verifying SysML Requirements using Activity Diagrams

Designing complex and critical systems needs a methodology to ensure the correctness of their specifications. Within an overall approach which considers the validation of SysML designs, this paper proposes a methodology for verifying SysML requirements on activity diagrams. The objective is to define a complete process to formalize and verify SysML functional requirements related to activity diagrams. Our contributions lie, first, in the definition of AcTRL (Activity Temporal Requirement Language), a new language for the formalization of functional requirements at SysML level. Second, in the proposed verification methodology which is guided by the https://static-content.springer.com/image/art%3A10.1007%2Fs11334-016-0281-y/MediaObjects/11334_2016_281_IEq1_HTML.gif verify https://static-content.springer.com/image/art%3A10.1007%2Fs11334-016-0281-y/MediaObjects/11334_2016_281_IEq2_HTML.gif relationships between SysML requirements and activity diagrams. The verification is enabled by formalizing SysML activities with hierarchical coloured Petri nets (HCPNs) and by automatically translating SysML requirements expressed on AcTRL into temporal logic. Our methodology takes into account the hierarchical structure of SysML activities and their relations with SysML requirements to provide a modular and incremental verification. A case study for a ticket vending machine is presented to illustrate the different steps and the benefits of the proposed methodology

Towards the Formal Verification of SysML Specifications: Translation of Activity Diagrams into Modular Petri Nets

International audienceThe SysML Activity diagram can be used to describe the behavior of complex systems which integrate an increasing number of components and a variety of technologies. Call behavior actions are SysML activity diagram elements used for structuring, composing and reusing activities. However, when designing complex and critical systems, the use of formal methods is strongly recommended for their validation, but the SysML language lacks formal semantics to achieve behavioral requirement verification. The present paper proposes a model-to-model transformation of SysML activity diagrams into modular Petri nets. We want to preserve the compositional structure of SysML activity diagrams in the derived Petri nets for enabling their modular and incremental verification

Validation of a SysML based design for wireless sensor networks

International audienceWhen developing complex systems, the requirement for the verification of the systems’ design is one of the main challenges. Wireless Sensor Networks (WSNs) are examples of such systems. We address the problem of how WSNs must be designed to fulfil the system requirements. Using the SysML language, we propose a Model Based System Engineering (MBSE) specification and verification methodology for designing WSNs. This methodology uses SysML to describe the WSNs requirements, structure and behaviour. Then, it translates SysML elements to an analytic model, specifically, to a Deterministic Stochastic Petri Net. The proposed approach allows to design WSNs and study their behaviors and their energy performances

Recursive ECATNets-Based Approach for Formally Verifying SysML Activity Diagrams

International audienceSystem Modelling Language (SysML) is a modelling language that allows system description with various integrated diagrams. The SysML activity diagram (SAD) is widely used to graphically describe system behaviours. Nevertheless, despite the various advantages of SysML, it lacks for formal semantics to achieve the verification of behavioural requirements. Petri nets (PNs) are a popular technique for modelling and verifying the dynamic behaviours of systems. Recursive ECATNets (RECATNets) not only take all the advantages of PNs but also allow concise specifications and more capabilities for the verification process. In this study, the authors propose an approach which describes a verification methodology of SADs based on their transformation into RECATNet models. Case studies are presented to show the benefits and the usefulness of the proposed approach